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  ? semiconductor components industries, llc, 2011 may, 2011 ? rev. 13 1 publication order number: mc74hc574a/d mc74hc574a octal 3-state noninverting d flip-flop high ? performance silicon ? gate cmos the mc74hc574a is identical in pinout to the ls574. the device inputs are compatible with standard cmos outputs; with pull ? up resistors, they are compatible with lsttl outputs. data meeting the set ? up time is clocked to the outputs with the rising edge of the clock. the output enable input does not affect the states of the flip ? flops but when output enable is high, all device outputs are forced to the high ? impedance state. thus, data may be stored even when the outputs are not enabled. the hc574a is identical in function to the hc374a but has the flip ? flop inputs on the opposite side of the package from the outputs to facilitate pc board layout. features ? output drive capability: 15 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0  a ? in compliance with the requirements defined by jedec standard no. 7 a ? chip complexity: 266 fets or 66.5 equivalent gates ? these devices are pb ? free and are rohs compliant http://onsemi.com 20 1 1 20 marking diagrams soic ? 20 dw suffix case 751d hc574a awlyywwg hc 574a alyw   tssop ? 20 dt suffix case 948e soeiaj ? 20 f suffix case 967 74hc574a awlywwg 1 1 1 20 1 20 20 20 see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information pdip ? 20 n suffix case 738 1 20 mc74hc574an awlyywwg 1 20 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or  = pb ? free package (note: microdot may be in either location)
mc74hc574a http://onsemi.com 2 figure 1. pin assignment d4 d2 d1 d0 output enable gnd d7 d6 d5 d3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 q3 q2 q1 q0 v cc clock q7 q6 q5 q4 function table inputs output oe clock d q lhh lll l l,h, x no change hxxz x = don?t care z = high impedance figure 2. logic diagram data inputs d0 219 q0 d1 d2 d3 d4 d5 d6 d7 clock output enable 3 4 5 6 7 8 9 11 1 18 17 16 15 14 13 12 q1 q2 q3 q4 q5 q6 q7 noninverting outputs pin 20 = v cc pin 10 = gnd design criteria value units ?????????? ?????????? internal gate count* ??? ??? ???? ???? ?????????? ?????????? ??? ??? ???? ???? ?????????? ?????????? ?????????? ??? ??? ??? ???? ???? ????  w ?????????? ?????????? ??? ??? ???? ???? ??????????????? ??????????????? ? input nand gate.
mc74hc574a http://onsemi.com 3 maximum ratings symbol parameter value unit v cc dc supply voltage  0.5 to  7.0 v v i dc input voltage  0.5 to v cc  0.5 v v o dc output voltage (note 1)  0.5 to v cc  0.5 v i ik dc input diode current  20 ma i ok dc output diode current  35 ma i o dc output sink current  35 ma i cc dc supply current per supply pin  75 ma i gnd dc ground current per ground pin  75 ma t stg storage temperature range  65 to  150  c t l lead temperature, 1 mm from case for 10 seconds 260  c t j junction temperature under bias  150  c  ja thermal resistance pdip soic tssop 67 96 128  c/w p d power dissipation in still air at 85  c pdip soic tssop 750 500 450 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 30% ? 35% ul 94 v ? 0 @ 0.125 in v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) >4000 >300 >1000 v i latchup latchup performance above v cc and below gnd at 85  c (note 5)  300 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. i o absolute maximum rating must be observed. 2. tested to eia/jesd22 ? a114 ? a. 3. tested to eia/jesd22 ? a115 ? a. 4. tested to jesd22 ? c101 ? a. 5. tested to eia/jesd78. recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 6.0 v v i , v o dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types  55  125  c t r , t f input rise and fall time (figure 3) v cc = 2.0 v v cc = 4.5 v v cc = 6.0 v 0 0 0 1000 500 400 ns 6. unused inputs may not be left open. all inputs must be tied to a high ? or low ? logic input voltage level.
mc74hc574a http://onsemi.com 4 ordering information device package shipping ? mc74hc574ang pdip ? 20 (pb ? free) 18 units / box mc74hc574adwg soic ? 20 wide (pb ? free) 38 units / rail mc74hc574adwr2g soic ? 20 wide (pb ? free) 1000 tape & reel MC74HC574ADTR2G tssop ? 20* 2500 tape & reel mc74hc574afg soeiaj ? 20 (pb ? free) 40 units / rail mc74hc574afelg soeiaj ? 20 (pb ? free) 2000 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free. dc electrical characteristics (voltages referenced to gnd) v cc v guaranteed limit symbol parameter test conditions  55 to 25  c  85  c  125  c unit ???? ???? ???? v ih ???????? ???????? ???????? ? level input voltage ?????????? ?????????? ??????????  20  a ??? ??? ??? ????? ????? ????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ? level input voltage ?????????? ?????????? ?????????? ??????????  20  a ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???????? ???????? ???????? ? level output voltage ?????????? ?????????? ??????????  20  a ??? ??? ??? ????? ????? ????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ? level output voltage ?????????? ?????????? ?????????? ??????????  2.4 ma |i out |  6.0 ma |i out |  7.8 ma ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ???????? ? level output voltage ?????????? ?????????? ??????????  20  a ??? ??? ??? ????? ????? ????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ?????????? ?????????? ??????????  2.4 ma |i out |  6.0 ma |i out |  7.8 ma ??? ??? ??? ????? ????? ????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???????? ???????? ???????? ?????????? ?????????? ?????????? ??? ??? ??? ????? ????? ?????  0.1 ??? ??? ???  1.0 ???? ???? ????  1.0 ??? ??? ???  a ???? ???? ???? ???????? ???????? ???????? ? state leakage current ?????????? ?????????? ?????????? ? impedance state v in = v il or v ih v out = v cc or gnd ??? ??? ??? ????? ????? ?????  0.5 ??? ??? ???  5.0 ???? ???? ????  10 ??? ??? ???  a ???? ???? ???????? ???????? ?????????? ??????????  a ??? ??? ????? ????? ??? ??? ???? ???? ??? ???  a
mc74hc574a http://onsemi.com 5 ac electrical characteristics (c l = 50 pf; input t r = t f = 6.0 ns) v cc v guaranteed limit symbol parameter  55 to 25  c  85  c  125  c unit ???? ???? ???? ???? f max ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ????????????????? ????????????????? ????????????????? ??? ??? ??? ????? ????? ????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ??????????????????? ??????????????????? ????? ????? ??? ??? ???? ???? ??? ??? ???? ???? ??????????????????? ??????????????????? ? state output capacitance, output in high ? impedance state ????? ????? ??? ??? ???? ???? ??? ??? typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (per enabled output)* 24 pf *used to determine the no ? load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . timing requirements (c l = 50 pf; input t r = t f = 6.0 ns) guaranteed limit v cc ? 55 to 25  c  85  c  125  c symbol parameter figure volts min max min max min max unit ???? ???? ???? t su ???????????? ???????????? ???????????? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ???? ???? ???? ???? ???????????? ???????????? ???????????? ???????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ???? ???? ???? ???? ???????????? ???????????? ???????????? ???????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ???? ???? ???? ???? ???????????? ???????????? ???????????? ???????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??
mc74hc574a http://onsemi.com 6 figure 3. figure 4. clock q t r t f v cc gnd 90% 50% 10% 90% 50% 10% t plh t phl t tlh t thl t w 1/f max q q v m v m 90% 10% t pzl t plz t pzh t phz v cc gnd high impedance v ol v oh output enable switching waveforms figure 5. figure 6. figure 7. test circuit figure 8. expanded logic diagram 50% clock v cc valid gnd v cc gnd t su t h 50% data *includes all probe and jig capacitance. c l * test point device under test output *includes all probe and jig capacitance. c l * test point device under test output connect to v cc when testing t plz and t pzl . connect to gnd when testing t phz and t pzh . 1 k  c d q 2 d0 19 q0 c d q 3 d1 18 q1 c d q 4 d2 17 q2 c d q 5 d3 16 q3 c d q 6 d4 15 q4 c d q 7 d5 14 q5 c d q 8 d6 13 q6 c d q 9 d7 12 q7 11 clock 1 output enable mc74hc574a: v m = v oh x 0.5 mc74hct574a: v m = 1.3 v @ v cc = 3 v
mc74hc574a http://onsemi.com 7 package dimensions pdip ? 20 n suffix case 738 ? 03 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040   e 1.27 1.77 0.050 0.070 1 11 10 20 ? a ? seating plane k n f g d 20 pl ? t ? m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc soic ? 20 dw suffix case 751d ? 05 issue g 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane  h x 45  e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90  0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. 
mc74hc574a http://onsemi.com 8 package dimensions tssop ? 20 dt suffix case 948e ? 02 issue c dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . 110 11 20 pin 1 ident a b ? t ? 0.100 (0.004) c d g h section n ? n k k1 jj1 n n m f ? w ? seating plane ? v ? ? u ? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74hc574a http://onsemi.com 9 package dimensions soeiaj ? 20 f suffix case 967 ? 01 issue a dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.15 0.25 0.006 0.010 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e  10  0  10  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1  c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74hc574a/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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